//==========================================================================
//
//      ixdpg425_npe.inl
//
//      IXDPG425 ethernet I/O definitions.
//
//==========================================================================
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// -------------------------------------------
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//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   msalter
// Contributors:msalter
// Date:        2003-03-20
// Purpose:     ixdpg425 NPE ethernet definitions
//####DESCRIPTIONEND####
//==========================================================================

#ifdef CYGPKG_DEVS_ETH_ARM_IXDPG425_NPE_ETH0
#define CYGSEM_INTEL_NPE_USE_ETH0
#define CYGNUM_ETH0_ETH_ID    IX_ETH_PORT_1
#define CYGNUM_ETH0_PHY_NO    5
#define CYGDAT_NPE_ETH0_NAME  CYGDAT_DEVS_ETH_ARM_IXDPG425_NPE_ETH0_NAME
#endif

#ifdef CYGPKG_DEVS_ETH_ARM_IXDPG425_NPE_ETH1
#define CYGSEM_INTEL_NPE_USE_ETH1
#define CYGNUM_ETH1_ETH_ID    IX_ETH_PORT_2
#define CYGNUM_ETH1_PHY_NO    4
#define CYGDAT_NPE_ETH1_NAME  CYGDAT_DEVS_ETH_ARM_IXDPG425_NPE_ETH1_NAME
#endif

#define CYGDAT_ETH0_DEFAULT_ESA {0x00, 0x03, 0x47, 0xdf, 0x32, 0xa8}
#define CYGDAT_ETH1_DEFAULT_ESA {0x00, 0x03, 0x47, 0xdf, 0x32, 0xaa}